ECE 582

ECE 582 - Physical VLSI Design

Spring 2012

TitleRubricSectionCRNTypeHoursTimesDaysLocationInstructor
Physical VLSI DesignECE582N34008LCD40930 - 1050 T R  143 Everitt Laboratory Martin D F Wong

Official Description

Basic physical design requirements for VLSI; performance-oriented formulation and optimization of chip partitioning, module placement and interconnection; optimized design and layout of on-chip modules; circuit extraction; high-speed VLSI circuits; yield and reliability analysis; advanced VLSI packaging and parametric testing. Course Information: Prerequisite: ECE 425 or ECE 482.

Subject Area

  • Integrated Circuits and Systems

Course Director

Description

Basic physical design requirements for VLSI; performance-oriented formulation and optimization of chip partitioning, module placement and interconnection; optimized design and layout of on-chip modules; circuit extraction; high-speed VLSI circuits; yield and reliability analysis; advanced VLSI packaging and parametric testing.

Topics

  • Basic physical design requirements for VLSI: technology; chip performance and cost; technology updateability; reliability
  • Physical design methodologies: algorithms in logic partitioning placement and routing interconnection parasitics and delays
  • Optimization problems in module generation
  • Modeling and extraction of circuit parameters from physical layout
  • High-speed VLSI circuits
  • Circuit optimization for yield and reliability
  • Wafer-scale integration
  • Advanced VLSI packaging and parametric testing

Detailed Description and Outline

Topics:

  • Basic physical design requirements for VLSI: technology; chip performance and cost; technology updateability; reliability
  • Physical design methodologies: algorithms in logic partitioning placement and routing interconnection parasitics and delays
  • Optimization problems in module generation
  • Modeling and extraction of circuit parameters from physical layout
  • High-speed VLSI circuits
  • Circuit optimization for yield and reliability
  • Wafer-scale integration
  • Advanced VLSI packaging and parametric testing

Texts

Class notes, recent papers.

Collateral Reading:
T.C. Hu and E.S. Kuh, Eds., VLSI Circuit Layout: Theory and Design, IEEE Press, 1985.
M. Shoji, CMOS Digital Circuit Technology, Prentice-Hall, 1987.
S.M. Sze, Ed., VLSI Technology, McGraw-Hill, 1983.

Last updated

2/13/2013