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ECE Colloquium (500): "On-chip Thermal Analysis, Optimization, and Mitigation"

SpeakerProfessor Sachin Sapatnekar, University of Minnesota
Date:Nov 12, 2009
Time:4:00 pm
Location:151 Everitt
ECE Faculty Host: Deming Chen
Sponsor:Department of Electrical and Computer Engineering
Event Type:ECE 500

Abstract:
With new technology trends, arising from a confluence of factors such as Moore's law scaling and 3D integration, the role of thermal design is inexorably shifting from package-centric issues towards on-chip optimizations. This talk overviews the roots of this change and its effect on the design of next-generation high-performance circuits. The presentation will begin with an overview of the impact of elevated temperatures on circuit performance and reliability. Next, methods for thermal analysis will be overviewed, followed by a description of a set of techniques for optimizing and mitigating thermal effects.

Biography:
Sachin Sapatnekar received the Ph.D. degree from the University of Illinois at Urbana-Champaign in 1992. He is currently on the faculty of the University of Minnesota, where he holds the Distinguished McKnight University Professorship and the Henle Professorship in Electrical and Computer Engineering. His research interests are in the area of electronic design automation. He is currently the General Chair for the ACM/IEEE Design Automation Conference and will soon take over as Editor-in-Chief of the IEEE Transactions on Computer-Aided Design. He is a recipient of the NSF Career Award, five Best Paper awards, and the Semiconductor Research Corporation (SRC) Technical Excellence award. He is a fellow of the IEEE.