ECE 343
Electronic Circuits Laboratory
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Section  Type  Times  Days  Location  Instructor 

F  LAB  1400  1650  M W  268 Everitt Lab  Chandrasekhar Radhakrishnan Palash Sarker 
G  LAB  1400  1650  T R  268 Everitt Lab  Chandrasekhar Radhakrishnan Matthew Amrein 
Web Page  http://courses.engr.illinois.edu/ece343/ 

Official Description  Companion laboratory for ECE 342. Course Information: Credit is not given for both ECE 343 and PHYS 404. Prerequisite: Credit or concurrent registration in ECE 342. 
Subject Area  Integrated Circuits and Systems 
Course Prerequisites  Credit or concurrent registration in ECE 342 
Course Directors 
Chandrasekhar Radhakrishnan

Detailed Description and Outline 
This course is designed to supplement the material of ECE 342 and provide a first experience in design, simulation, analysis, and test of electronic circuits using PSpice and lab instruments. Topics:

Computer Usage 

Topical Prerequisities 

Texts 
No text. 
ABET Category 
Engineering Science: 25% 
Course Goals 
ECE 343 is an adjunct to ECE 342  Electronic Circuits  and is required for ECE majors. The goals are to supplement the material of ECE 342, to assist students in obtaining a better understanding of the operation of microelectronic circuits, and to provide a first experience in design, analysis, and test of microelectronic circuits using PSpice and lab instruments.
Project #1 Network Analysis (6 hours) At the end of this project, the students will be able to do the following: 1. Create a circuit using OrCAD Capture, edit the parameters of the circuit elements, set up the type of analysis, run the simulation, and demonstrate the results using Probe. (d, k) 2.. Analyze a circuit containing two resistors, one capacitor, and one pulse voltage source and find the step response of the voltages in the circuit. (a, d) 3. Simulate the circuit using PSpice and check the validity of the theoretical analysis. (d, k) 4. Deduce the values of the components inside a box containing three resistors and one capacitor by measuring time constants, voltages, currents, and resistances at the box terminals using DMMs, an oscilloscope, a function generator, and a power supply, and analyze and present the scope display. (b, d, e) 5. Simulate the deduced circuit in box and verify the measurements on PSpice. (b, d, k) Project #2 Power Supply Circuit (9 hours) At the end of this project, the students will be able to do the following: 1. Design a dc power supply containing a transformer, rectifier, filter, and regulator, that meets the output specifications and cost requirement. (a, b, c, d) 2. Verify the design on PSpice by simulating the complete power supply circuit and analyzing the performance specifications. (c, d, k) 3. Build the power supply circuit from actual parts, benchtest it, and demonstrate the output performance and power dissipation. (b, d) 4. Analyze and present the scope display and compare with the theoretical PSpice values. (b, c, d, k) Project #3 MOS Logic Circuits (12 hours) At the end of this project, the students will be able to do the following: 1. Design and simulate CMOS and NMOS logic circuits on PSpice to achieve the highest value of the evaluation function which involves propagation delay, noise margin, power dissipation, and cost. (c, d, k) 2. Analyze the MOS logic circuits and justify the optimization techniques using the theory from ECE 342. (a, c, d) 3. Build a CMOS or NMOS logic circuit, verify the logic function, and measure the propagation delay, noise margin, and power dissipation using an oscilloscope, function generator, and power supply. (b, d) 4. Analyze and present the scope display and compare with the theoretical values. (b, c, d, k) Project #4 CMOS Op Amp (12 hours) At the end of this project, the students will be able to do the following: 1. Design and simulate the current source of an op amp using PSpice, calculate the reference resistance for given reference current, determine the output resistance of the current source from the currentvoltage plot of the current source output, adjust the output current by varying the “M” parameter, and compare the simulation results to the theoretical values. (a, c, d, k) 2. Design and simulate the difference pair of the op amp with a resistive load using PSpice; plot the dc transfer curves for differencemode and commonmode; measure the differencemode gain, commonmode gain, and CMRR; and compare the simulation results with the theoretical values calculated using smallsignal analysis. (a, c, d, k) 3. Design and simulate the active load of the differential amplifier using PSpice; plot the dc transfer curves for differencemode and commonmode; measure the differencemode gain, commonmode gain, and CMRR; and compare the simulation results with the theoretical values calculated using smallsignal analysis. (a, c, d, k) 4. Design and simulate the gain stage of the op amp using PSpice; adjust the output bias voltage by changing the width of the amplifier transistor and that of the current source transistor; plot the dc transfer curves for differencemode and commonmode; measure the differencemode gain, commonmode gain, and CMRR; find the offset voltage of the amplifier; and compare the simulation results with the theoretical values calculated using smallsignal analysis. (a, c, d, k) 5. Design and simulate the bias circuit and output buffer of the op amp using PSpice; adjust the output bias voltage; plot the dc transfer curves for differencemode and commonmode; measure the differencemode gain, commonmode gain, CMRR, and offset voltage; find the output resistance of the op amp by running the transfer function analysis; and compare the simulation results with the theoretical values calculated using smallsignal analysis. (a, c, d, k) 6. Simulate the complete op amp circuit and optimize its performance using PSpice, maximize the difference gain, zero the output bias voltage, lower the output resistance and power dissipation of the op amp, and justify the optimization techniques using the theory from ECE 442. (a, c, d, k) 7. Simulate various test circuits to demonstrate the behavior of the optimized op amp. (a, c, d, k) Each project requires a written report fulfilling ABET outcomes (f) and (g). 