ECE 412
Microcomputer Laboratory

Displaying course information from Spring 2010.

Section Type Times Days Location Instructor
AB LAB -     Deming Chen
AL LEC 1500 - 1550 T R   260 Everitt Lab  Deming Chen
Web Page http://courses.engr.illinois.edu/ece412/
Official Description Design, construction, and use of a small general-purpose computer with a micro-processor CPU; MSI and LSI circuits used extensively; control panel, peripheral controllers, control logic, central processor, and programming experiments. Course Information: Prerequisite: ECE 385; ECE 391 or CS 233. Recommended: Credit or concurrent registration in ECE 411.
Subject Area Computer Engineering
Course Prerequisites Credit in ECE 385
Credit in ECE 391 or CS 241
Course Directors Rakesh Kumar
Detailed Description and Outline

Topics:

  • Architecture and Operation of Field-Programmable Gate Arrays
  • CAD tools for FPGAs
  • Bus interfaces
  • Memory systems
  • Hardware and software for interrupt-driven I/O
  • Video input and output
  • Implementation of Linux device drivers
Lab Projects
  1. Construct a simple circuit and download it to a FPGA. Use of FPGA CAD software and Xilinx FPGA board.
  2. Polling and interrupt-based communication between a microprocessor and I/O devices.
  3. Video input and output. Digitizing an NTSC video input stream and construction of VGA output hardware.
  4. Open-ended team design project.
Lab Equipment
Intel PCs, Xilinx XUP FPGA board, Xilinx and Mentor CAD software, LCD displays, video cameras.
Texts
Class notes by the instructor.
ABET Category
Engineering Design: 100%
Course Goals

Course Goals and Objectives

This course is an elective for computer and electrical engineering majors. The objective of the course is to provide students with an in-depth microprocessor-based design experience, teaching them how to interface very large-scale integrated chips to microprocessors and how to design control software that integrates functions on the host microprocessor and peripheral devices. The course is project-oriented, with students completing three predefined machine problems and an open-ended design project during the semester. The three predefined machine problems are of increasing difficulty and address different issues in microprocessor-based design, preparing students to design and implement systems of their choosing in the design project portion of the class. The predefined machine problems change on a regular basis to keep up with the rapid pace of technology. The implementation of all lab projects is based on field programmable gate arrays (FPGAs), providing students with exposure to this increasingly popular technology and allowing implementation of hardware/software co-designed systems in reasonable amounts of time.

Currently the predefined machine problems are:

1) Implementation of a PS/2 keyboard reader on the FPGA and one other simple (open-ended) design on the FPGA.

2) Implementation of a SoC in a hardware/software co-design fashion.

3) Design and implementation of a video capture and display system using the FPGA board, a camera and a VAG monitor.

For the final project the students may use any of the I/O interfaces provided on the FPGA board and the boards and peripheral devices available in the lab to implement a system of their own design.

Instructional Objectives

A. By the end of the first machine problem (PS/2 Keyboard Interface), students should be able to:

1) Use CAD tools to translate a hardware design, specified in VHDL, into a bit file, and download the bit file onto an FPGA for execution (k)

2) Implement basic designs as state machines in VHDL (a) (k)

3) Use functional simulators to debug their designs and use a logic analyzer to debug and correct their hardware implementations (k)

4) Implement the PS/2 keyboard protocol in VHDL for execution on an FPGA (k)

5) Successfully demonstrate a working PS/2 keyboard interface on the FPGA board as specified in the project assignment (g)

B. By the end of the second machine problem (SoC implementation) students should be able to:

1) Become introduced to the EDK environment of Xilinx which simplifies the implementation of SoC designs that use hardware components and software modules running on PowerPC/Microblaze processors, all connected around the IBM CoreConnect bus architecture. A small hardware module needs to be completed by the students. (e)(k)(j)

2) Use the EDK environment to build a user interactive system which uses PowerPC to receive/display data from/to the user and a custom hardware module to process the data. Design of both the PowerPC software and the hardware module is completed by the students. (c)(d)(e)(k)

3) Become familiar with the use of operating systems on embedded systems by running Linux in the PowerPC and designing a Linux driver for the communication of PowerPC with the hardware module. (c)(d)(e)(k)

C. By the end of the third machine problem (Video Capture and Display System), students should be able to:

1) Design and implement a VGA controller that reads RGB data from the board DDR and sources them to the VGA interface of the board along with correctly timed VGA synchronization signals. (c)(e)(k)

2) Design and implement a YUV-to-RGB converter for on-the-fly conversion of the video input interlaced image to VGA compatible pixel data (fed to the VGA controller). (a)(c)(e)(k)

3) Design and implement an I2C controller for the video decoder which converts the analog camera input signals into YUV data (for use by the YUV-to-RGB converter). (a)(c)(d)(e)(k)

D. By the end of the design project, students should be able to:

1) Design a complete hardware/software system involving computation, interfacing with an external device, and digital logic (a)(b)(e)(j)

2) Read and interpret specification sheets for integrated circuits sufficiently well to use the integrated circuits in their designs (e)

3) Plan and carry out a six-week design and implementation effort (d)(e)

4) Demonstrate and explain their completed system, including a discussion and justification of design choices (g)

Laboratory Objectives

Laboratory projects are done using a combination of the Mentor design framework, VHDL simulation tools, and programming under the Linux operating system. This provides students with experience in a number of the tools and development systems used in industry.

Lab reports are graded according to design correctness, design style, and documentation quality. Points are taken off for design errors, unnecessary complications, excessive parts, and vague documentation. Machine problems 2 and 3, as well as the design project, are done in small teams. Students are responsible for the division of effort within each project, but each student in the team is required to demonstrate each project and to answer questions about the design to ensure that all of the students on a team participate in each project.

Two of the three machine problems incorporate open-ended design components to give students experience with design prior to the major design project. The design project is graded based on the final project report, an initial design document, which is turned in before any work on the project begins, and an oral presentation on the design.

Last updated: 2/18/2013