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Contact Info

William H. Sanders
Department Head
306 N. Wright Street
Urbana, IL 61801
Ph: (217) 333-2300
Fax: (217) 244-7075

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Rob A. Rutenbar

Electrical and Computer Engineering
Rob A. Rutenbar
Rob A. Rutenbar
  • Computer Science
2232 Siebel Center for Comp Sci
201 N. Goodwin Ave.
Urbana Illinois 61801
(217) 333-3373


  • Computer Science

Primary Research Area

  • Artificial Intelligence


Ph.D. in Computer, Information and Control Engineering, The University of Michigan, 1984.

For more information

Rutenbar personal CS website

Research Interests

Software tools for integrated circuit design; tools for understanding nanoscale IC designs; silicon accelerator architectures for computationally difficult tasks

Books Authored or Co-Authored (Original Editions)

Rob A. Rutenbar, Georges G.E. Gielen, Brian Antao, eds., Computer Aided Design of Analog Integrated Circuits and Systems, IEEE Press and Wiley-Interscience, 2002, ISBN: 047122782X.

Selected Articles in Journals

  • S. Tiwary and R.A. Rutenbar, "Scalable Trajectory Methods for Macromodeling Custom Circuits," submitted to IEEE Transactions on CAD, October 2008.
  • A. Singhee, R. A. Rutenbar, “Statistical Blockade Very Fast Statistical Simula¬tion and Modeling of Rare Circuit Events, and its Application to Memory Design,” IEEE Trans. CAD, vol. 28, No. 8, August 2009.
  • A. K. Jones, S. P. Levitan, R. A. Rutenbar, Y. Xie, "Collaborative VLSI-CAD Instruction in the Digital Sandbox," submitted to IEEE Transactions on Education, October 2007.
  • A. Singhee, R.A. Rutenbar, "Probabilistic Interval-Valued Computation: Toward a Practical Surrogate for Statistics Inside CAD Tools," IEEE Transactions on CAD, to appear 2009.
  • Benton H. Calhoun, Yu Cao, Xin Li, Ken Mai, Lawrence T. Pileggi, Rob A. Rutenbar and Kenneth L. Shepard, "Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS," Proceedings of the IEEE, Vol. 96, No. 2, pages 343-365, February 2008.

Invited Lectures

  • "Toward Silicon Perception," 2012 Intel Embedded Research & Education Summit, Intel Corp., Chandler, AZ, February 2012.
  • "Analog Synthesis (and Verification) Revisited: What's Missing?," Frontiers in Analog Circuit (FAC) Synthesis and Verification Workshop, Co-located with the Computer Aided Verification (CAV) Conference, Snowbird, UT, July 2011.
  • "ICIC: Integrated Circuits for Inference Computations," FCRP Center for Circuit & System Solutions (C2S2) Enterprise Theme Review, Intel Corp., Jones Farm Conference Center, Hillsboro, OR, July 2011.
  • "EDA Research: Stalled, Driving in Circles, or Running out of Gas?" panel presentation at ACM/IEEE Design Automation Conference (DAC), June 2011.
  • "Using the Mathematics of Money and Risk to Understand the Statistics of Nanoscale Circuits," Dept of Electrical and Computer Engineering graduate seminar, University of Illinois at Urbana Champaign, Urbana, IL, November 2010.

Research Honors

  • 2013 Donald O. Pederson TCAD Best Paper Award (2013)
  • 2011 Donald O. Pederson TCAD Best Paper Award (2011)