ECE faculty and students win IEEE FCCM Best Paper Award
By April Dahlquist, Coordinated Science Lab
May 26, 2011
- ECE Professors Wen-mei Hwu and Deming Chen and ECE grad students Alex Papakonstantinou and John Stratton were part of a research team that won the Best Paper Award at the IEEE International Symposium on Field-Programmable Custom Computing Machines.
- The paper addressed the challenges facing application developers who work with field-programmable gate arrays (FPGAs).
- The researchers designed effective resource models and identified an efficient search algorithm to explore the multidimensional design space.
Building on the work that won them an IEEE best paper nod in 2009, ECE Professors Wen-mei W. Hwu and Deming Chen have captured another Best Paper Award at the recent IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM). Hwu and Chen are researchers in the Coordinated Science Lab.
The winning paper was titled “Multilevel Granularity Parallelism Synthesis on FPGAs,” and was written in collaboration with ECE grad students Alex Papakonstantinou and John Stratton, postdoc research fellow Eric Liang of the Advanced Digital Science Center, Singapore, and researchers from UCLA.
FPGAs, or field-programmable gate arrays, are semiconductor devices that allow users to change the functionality of the chip. Previously, changing a chip required manufacturing a new batch, which can cost millions. An FPGA is a reprogrammable, generic chip, eliminating the need to build a new model in the event of a bug or change in intention.
According to Chen, FPGAs are specifically suitable for low to medium volume applications. Such examples include MRI machines, high-end image and audio processing, DNA assembly, encryption and compression, and network routing. FPGAs are also beneficial in industries where the technology changes at a fast pace.
The paper addressed challenges facing application developers, who have found FPGAs difficult to program. This work makes it easier to create applications that use FPGAs, especially when the applications run on GPUs.
“I think the high-level reason why this work was well received was because it addressed a very long standing problem,” said Hwu. “It is breaking a barrier for a large number of software developers.”
Hwu compared the process to a woman getting ready: She will choose a dress, shoes and hairstyle that complement the other. If one doesn’t work, most likely the other variables will change. The hardware has to be aware of all the variables subject to change and still be able to function efficiently.
The researchers designed effective resource models and identified an efficient search algorithm to explore the multidimensional design space, according to Liang.
“There are many factors that affect performance and all these facets interact with each other,” said lead author Papakonstantinou.
The paper also stood out among its competitors in the conference because it not only introduced a significant improvement in ease of use, but also explored its use in high-performance computing.
The next phase of research will focus on further improving performance and applying the work to other programming models.
Editor's note: media inquiries should be directed to Brad Petersen, Director of Communications, at email@example.com or (217) 244-6376.