Faculty
Deming Chen
Assistant Professor
410 Coordinated Science Lab, MC-228
1308 W. Main St.
Urbana, Illinois 61801
(217) 244-3922
Ph.D. in Computer Science,
University of California at Los Angeles,
Los Angeles, California,
2005
Research Statement:
According to the International Technology Roadmap for Semiconductors, the spectacular CMOS technology scaling will continue to evolve and dominate the semiconductor industry for at least another 10 years. This will lead to over 14 billion transistors integrated on a single chip in the 18nm technology by the year 2018. Such a scaling has already created a large design productivity gap due to inherent design complexities and deep submicron issues. Meanwhile, development cost, including both the design cost and manufacturing cost, of integrated circuits has grown significantly given the increasing size of the design team and the lengthy design cycles. Both problems, if not addressed, will be the red brick walls on the technology roadmap. Some key solutions for managing the exponential increase of the design complexity are the development of more scalable optimization engines, higher degree of design automation, and design reuse. Some key solutions for controlling the increase in manufacturing cost are design for manufacturing, use of alternative silicon implementation platforms, and silicon reuse. In this context, the research group led by Prof. Chen will mainly pursue the following research directions: FPGA/structured ASIC physical synthesis for timing and power closure, compilation and behavioral synthesis with physical planning, design space exploration for system-on-chip, microarchitecture design, and the design of novel computing platforms, including FPGAs with nanotechnology.
Research Interests:
- Synthesis and architecture exploration for programmable logic devices
- Nanoscale FPGA design methodology
- Compilation and high-level synthesis
- Reliable microprocessor architecture design under process variation
- Low power design and synthesis
- Reconfigurable computing
- Algorithmic design and applications
Undergraduate Research Opportunities:
Behavioral synthesis for low power (preferred background: ECE425)
Circuits process variation modeling (preferred background: STAT/MATH451)
SoC (system-on-a-chip) design (preferred background: ECE425 and ECE391)
Logic synthesis (preferred background: ECE425 and ECE462)
For more information:
Professor Chen's Home Page
Honors, Recognition, and Outstanding Achievements
- Best Paper Award, SASP (IEEE Symposium on Application Specific Processors), 2009
- Best Paper Award, ASPDAC (IEEE/ACM Asia and South Pacific Design Automation Conference), 2009
- CAREER Award, National Science Foundation, 2008
- Arnold O. Beckman Research Award, UIUC, 2007
- Achievement Award for Excellent Teamwork, Aplus Design Technologies, Inc, 2001
Honors, Recognition, and Outstanding Achievements for Teaching
- On the List of Teachers Ranked as Excellent by Students, Spring 2008